Anvo-Systems Dresden non-volatile SRAM

Non-volatile SRAMs from Anvo-Systems Dresden combine two proven technologies (CMOS-SRAM and SONOS non-volatile memory) into a new technology that is greater than the sum of its parts – creating an outstanding new product family of fast, reliable and energy efficient memories.

Based on standard parallel or serial SPI SRAM pinning, with unrestricted internal SRAM functionality, both fast reads and writes can be executed with the same high speed. In fact, the devices can be operated as standard SRAM. However, this SRAM comes with built in data protection.
The highly parallel internal architecture, and our extremely energy efficient STORE mechanism enables the device to transfer the whole SRAM data to/from the non-volatile array in just one single step operation (8ms STORE / 10μs RECALL). Since there is no wear out mechanism for write access the number of write cycles is unlimited and continuous write is possible.

Besides non-volatile instruction controlled operation inside the normal operation voltage range, the nvSRAM can execute a store operation on a power drop or at power down as well. The energy needed for this operation comes from a small capacitor. Our future range of products will feature this capacitor integrated into the package. This extreme energy efficiency increases product reliability as well as enables new applications for our customers.

There is a comprehensive set of mechanisms for monitoring safe volatile and non-volatile data transfer.

Learn more about Anvo-Systems Dresden's nvSRAM!

Roadmap

Roadmap

Architecture of nvSRAM

Architecture of nvSRAM