SPI nvSRAM Simulation Model

Anvo-Systems provides an abstract simulation model for Anvo-Systems Serial nvSRAMs. It is written in SystemVerilog. The download contains the following items:

  • snvsram.sv
    The file contains the SystemVerilog source code of the Anvo-Systems SPI-nvSRAM. All the standard SPI devices can be simulated with this model.
  • snvsram_pkg.sv
    SystemVerilog package includes parameter definition for the different products as well as common functions and parameters.
  • spi_master.sv
    This file contains tasks for all implemented SPI-Command. The master can be configured to use SPI-Mode 0 or 3.
  • Spi_nvsram_tb.sv
    This file contains the sample test-cases for the serial nvSRAM.